TimeGen™ 5

Create timing diagrams by clicking and dragging with your mouse.

TimeGen™ 5 is the newest generation of the timing diagram editor engineers have used to write functional specs since 2003 — available online, or fully installed on your own computer for complete data privacy. Every edit made by clicking and dragging — no syntax to write.

Free to start · Windows, Mac, Linux
  spec_rev4.tgen — 3 signals
Spec sheets drawn with TimeGen, inside:
INTELIBMAMDSAMSUNGQUALCOMM CISCOXILINXANALOG DEVICESFREESCALE TEXAS INSTRUMENTSSTMICROELECTRONICSNATIONAL SEMICONDUCTOR NASAU.S. NAVYLOCKHEED MARTINSYNOPSYSRAMBUS INTELIBMAMDSAMSUNGQUALCOMM CISCOXILINXANALOG DEVICESFREESCALE TEXAS INSTRUMENTSSTMICROELECTRONICSNATIONAL SEMICONDUCTOR NASAU.S. NAVYLOCKHEED MARTINSYNOPSYSRAMBUS
The editor

Built for drawing specs.

Grab an edge, drag it, and the whole diagram redraws in real time — clocks, buses, and labels stay in sync as you work.

CLK

Live signal editing

Move edges, labels, and arrows with the mouse — even drag a clock's own waveform to set its phase. TimeGen redraws instantly, no rebuild step.

BUS

Buses & invalid regions

Model multi-bit buses, hi-Z, weak drive, glitches, and don't-care regions the way your datasheet actually shows them.

OUT

Export anywhere

Vector out to SVG and PDF, raster out to PNG — every format built for print or the web, sized right the first time.

DOC

Paste straight into Word

Ctrl+C copies the diagram straight to your clipboard — paste it directly into Word, PowerPoint, or your spec template. No round-trip.


Changelog

What's new in TimeGen 5.

The biggest change to the editor since it was founded in 2003.

timegen_changelog.logbuild web.1
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Fully asynchronous clocks and signals

Every clock, signal, and the relationships between them can run completely independently — no shared timebase forced on anything, so designs where nothing lines up on a single clock edge are just as easy to model as ones that do.

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Annotations that follow the edge you attached them to

Snap an arrow, interval, or text box to a signal or bus edge, and it stays attached — drag that edge later and the annotation moves with it automatically, instead of being left pointing at the wrong spot.

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Every signal state, not just high and low

0, 1, high-Z, weak drive, glitches, and Both-High-and-Low — each with ideal or sloped edges, drawn the way the signal actually behaved.

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Drag a clock's waveform to set its phase

Grab the trace itself and drag left or right — the properties panel tracks the phase slider live as you move it.

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Vector exports, rebuilt from scratch

SVG and PDF output generated and verified directly against real parsers and renderers.


TimeGen is perfect for writing design and functional specs to show timing diagram behaviors.
Atif Hussain, Design Engineer at Texas Instruments
Get started

Draw your first diagram in the next five minutes.

Free to start. Full editor, real export formats, no watermark.